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Showing posts from 2019

Coremark Platform - banchmark your MCU

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Recently we started a project based on Coremark. We name it Coremark Platform because the idea is to add support to many different MCUs so everybody can check how the benchmark is done and can easily port their MCU to see how will score.

A brief overview of drones flight control software

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A couple of days ago I have written a blog post for embeddedrelated.com with a brief overview of drone flight controllers. If you are interested in BetaFlight, PX4, Ardupilot, Paparazzi, CleanFlight, etc,  go and check this post: https://www.embeddedrelated.com/showarticle/1260.php

3 print screens explain how setup Eclipse with ST-LINK v2

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This setup is for STM32F103. Choose your STM32 in target link.

CMSIS Biquad Cascade IIR Filter + Iowa Hills IIR Filter Design

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You are looking at CMSIS IIR Filters ( https://www.keil.com/pack/doc/CMSIS/DSP/html/group__BiquadCascadeDF1.html ), and don't know how to use it? Don't worry, this example will clearly help you. The first thing that you need to know is that Biquad Cascade DF1 use this transfer function to do filtering. y[n] = b0 * x[n] + b1 * x[n-1] + b2 * x[n-2] - a1 * y[n-1] - a2 * y[n-2] It is hard to understand how this does filtering, especially if you looking at it in the time domain. In short this transfer function use current input(x[n]), and two last input(x[n-1], x[n-2]) and output (y[n-1], y[n-2]). Each new input function calculates new output and stores all the values. That is all that this filter does. The hardest part is to calculate coefficients b0, b1, b2, a1, a2, that is where Iowa Hills IIR  Filter Design jumps in. In this example, I'll do the band-pass filter for 1 Hz. In the image below you can see, what I selected at Iowa Hills IIR  Filter Design. N

Pixracer (STM32F427) CoreMark Score

The score is 275.34 at 168 MHz clock speed. CoreMark Size    : 666 Total ticks      : 21786 Total time (secs): 21.786989 Iterations/Sec   : 275.393585 Iterations       : 536999700 Compiler version : GCC7.2.1 20170904 (release) [ARM/embedded-7-branch revision 255204] Compiler flags   :  Memory location  : STACK seedcrc          : 0xe9f5 [536999700]crclist       : 0xe714 [536999700]crcmatrix     : 0x1fd7 [536999700]crcstate      : 0x8e3a [536999700]crcfinal      : 0xa14c CoreMark 1.0 :  275.393585  / GCC7.2.1 20170904 (release) [ARM/embedded-7-branch revision 255204] / STACK STM32F427            = 275.393585/168[MHz] = 1.63 TM4C123GH6PM   = 101.1378/80[MHz] = 1.26 It looks like it is not pure MHz what matter in MCU speed.

Tiva TM4C123GH6PM scores 101 points on CoreMark

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Lately, on STM page I have found out they put Coremark scores on brochures for the microcontrollers.  I was wondering what competitors scores, so I couldn't find anything for Texas Instrument. On https://www.eembc.org/ I have found out there is a source code of Caremark which can be ported on any platform, so I decided to port it on Tiva TM4C123GH6PM and test it. Here are the results: 2K performance run parameters for coremark. CoreMark Size    : 666 Total ticks      : 19775 Total time (secs): 19.774999 Iterations/Sec   : 101.1378 Iterations       : 2000 Compiler version : GCC7.2.1 20170904 (release) [ARM/embedded-7-branch revision 255204] Compiler flags   : Memory location  : STACK seedcrc          : 0xe9f5 [0]crclist       : 0xe714 [0]crcmatrix     : 0x1fd7 [0]crcstate      : 0x8e3a [0]crcfinal      : 0x4983 Correct operation validated. See README.md for run and reporting rules. CoreMark 1.0 :  101.1378 /  GCC7.2.1 20170904 (release) [ARM/embedded-7-branch r